Multiple core processors include hierarchical power domains. Portions of the processor not needed to support a current level of activity are powered down, a technique referred to as power gating. The power domains are hierarchical in the respect that a sub-domain within a parent domain may be separately enabled or disabled while its parent domain is active.
This ability to selectively power gate components within domains or sub-domains in an integrated circuit device is particularly important in handheld devices including, but not limited to, cell phones, personal digital assistants, portable entertainment systems, etc. In such devices, reducing the net power consumption of the device lengthens the amount of time between charges (or between replacements) of a battery power source. However, it is recognized that the selective ability to switch components on or off in an integrated circuit device is also important to traditional computer systems that are not dependent upon a battery source. For instance, laptops are often designed to dissipate a low amount of heat so that the user is comfortable handling the system. It may further be valuable to selectively power gate components to reduce the net power consumed on a traditional computer system. It is further recognized that the physical size of an integrated circuit device and/or computer system, and the amount of operating noise associated with the device/system, may also decrease as the number and size of heat sinks and fans is reduced.
Power gating can cause frequent changes in the current supplied to the power domains. In integrated circuit, devices large currents can cause reliability problems over time. For example, copper used in various lines of the device can move due to electromigration, which may result in the generation of shorted or open circuits. To mitigate the change in current over time during power state changes, it is common to use multiple or cascaded power gating signals so that all of the power gating transistors that power a secondary or virtual power bus do not activate at the same time. The power gating signals are distributed in a tree-like fashion across the power domain they are controlling. Branch lines distribute the power enable line to one or more power gating transistors. In signal line arrangements that employ this distribution tree approach, one or more branch lines may have a fault, causing portions of the branch line to remain at a logic “1” or a logic “0”. This type of fault is referred to as a “stuck-at fault,” and the detection of such faults is complicated by the need to return every branch line to the original source for comparison with the enable signal. This difficulty is exacerbated when multiple enable signals are used to manage the power sequencing in a controlled fashion.
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